What are the responsibilities and job description for the Digital Design Methodology Engineer position at Apple?
Summary
Description
Minimum Qualifications
Key Qualifications
- Typically requires 4 years experience in Synthesis, PNR and Power/Timing flows development.
- Understanding and exposure to Low Power Design analysis flows.
- Understand various aspects of partition level Synthesis and PNR including Power/Timing optimization, CTS, routing and UPF.
- Understand hierarchical Synthesis and P&R issues is a key (UPF, power-distribution, multi-voltage design).
- Strong TCL/Perl/Python/Makefile scripting knowledge. Proven track record of managing, and regressing Synthesis, P&R and Power/timing flows.
- We are looking for a self-motivated, dedicated problem solver. Strong interpersonal/communication skills are a requirement.
Preferred Qualifications
Education & Experience
Additional Requirements
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