Sr Design Verification Engineer (Chip-level) - Remote
Job Posting for Sr Design Verification Engineer (Chip-level) - Remote at Encore Semi, Inc.
Sr Design Verification Engineer (Chip-level)
Full Time
100% Remote
Job Description
As Senior Design Verification Engineer, you will work on improving the verification methodology and test coverage for complex SoC devices. You will be responsible for developing test plans, testbenches, and perform simulations to verify the interconnect, functionality, performance and other aspects of RTL designs at the chip-level. You will work very closely with the Architecture, RTL/uArch, cross-functional teams, and block-level verification engineers. Responsibilities also includes DFT (scan, JTAG, BIST).
Minimum Qualifications
Full Time
100% Remote
Job Description
As Senior Design Verification Engineer, you will work on improving the verification methodology and test coverage for complex SoC devices. You will be responsible for developing test plans, testbenches, and perform simulations to verify the interconnect, functionality, performance and other aspects of RTL designs at the chip-level. You will work very closely with the Architecture, RTL/uArch, cross-functional teams, and block-level verification engineers. Responsibilities also includes DFT (scan, JTAG, BIST).
Minimum Qualifications
- BS/MS in Computer Science/EE with 8 years of experience
- Experience with cluster level or chip/SoC level verification including experience with high-speed interfaces and protocols.
- Experience with top-level verification using C.
- Proficiency in UVM methodology, Constrained Random, Coverage Driven Methodology, Verilog, SystemVerilog.
- Expertise in scripting languages, Python or Perl.
- Strong debug skills and experience with debug tools such as Verdi.
- Proficiency in industry DFT tools.
- C/C experience
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Salary.com Estimation for Sr Design Verification Engineer (Chip-level) - Remote in Folsom, CA
$128,147 to $163,603
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