What are the responsibilities and job description for the Engineering - Electrical Engineer position at Equiliem?
Job Description: Please only submit candidate local to the Syracuse, NY area.
The LM manager is looking for one Level 3 Electrical Engineer and one Level 4 Electrical Engineer.
*** Rotary and Mission Systems in Syracuse, NY is seeking a full-time Mid Career Firmware Engineer (FPGA Design).
In this role, you will support design and architecture development, implement FPGA designs and integrate and troubleshoot designs.
The successful candidate will have experience with FPGA architecture and design, and troubleshooting.
Required Skills:
Working knowledge of digital signal processing.
Extensive VHDL or Verilog firmware programming capability, and having applied that knowledge on an FPGA device (Xilinx, Client, Microsemi).
Having utilized Xilinx Vivado, Client Quartus, or Microsemi Libero development platforms to successfully build and test an executable hardware implementation of code which they have written.
Use of the Mentor Questa HDL simulator, including UVM verification techniques.
Experience with MATLAB modeling is a plus.
Higher level code development, including Nvidia CUDA, OpenCL, Simulink HDL Coder, and Xilinx System Generator are also a plus.
Hourly Pay Rate Ranges:
Level 3 Rate: *** to ***
Level 4 Rate: *** to ***
Interim Secret Clearance is Required to start.
Comments for Suppliers: Please only submit candidate local to the Syracuse, NY area.
The LM manager is looking for one Level 3 Electrical Engineer and one Level 4 Electrical Engineer.
Required Skills:
Working knowledge of digital signal processing.
Extensive VHDL or Verilog firmware programming capability, and having applied that knowledge on an FPGA device (Xilinx, Client, Microsemi).
Having utilized Xilinx Vivado, Client Quartus, or Microsemi Libero development platforms to successfully build and test an executable hardware implementation of code which they have written.
Use of the Mentor Questa HDL simulator, including UVM verification techniques.
Experience with MATLAB modeling is a plus.
Higher level code development, including Nvidia CUDA, OpenCL, Simulink HDL Coder, and Xilinx System Generator are also a plus.
Hourly Pay Rate Ranges:
Level 3 Rate: *** to ***
Level 4 Rate: *** to ***
Interim Secret Clearance is Required to start.
The LM manager is looking for one Level 3 Electrical Engineer and one Level 4 Electrical Engineer.
*** Rotary and Mission Systems in Syracuse, NY is seeking a full-time Mid Career Firmware Engineer (FPGA Design).
In this role, you will support design and architecture development, implement FPGA designs and integrate and troubleshoot designs.
The successful candidate will have experience with FPGA architecture and design, and troubleshooting.
Required Skills:
Working knowledge of digital signal processing.
Extensive VHDL or Verilog firmware programming capability, and having applied that knowledge on an FPGA device (Xilinx, Client, Microsemi).
Having utilized Xilinx Vivado, Client Quartus, or Microsemi Libero development platforms to successfully build and test an executable hardware implementation of code which they have written.
Use of the Mentor Questa HDL simulator, including UVM verification techniques.
Experience with MATLAB modeling is a plus.
Higher level code development, including Nvidia CUDA, OpenCL, Simulink HDL Coder, and Xilinx System Generator are also a plus.
Hourly Pay Rate Ranges:
Level 3 Rate: *** to ***
Level 4 Rate: *** to ***
Interim Secret Clearance is Required to start.
Comments for Suppliers: Please only submit candidate local to the Syracuse, NY area.
The LM manager is looking for one Level 3 Electrical Engineer and one Level 4 Electrical Engineer.
Required Skills:
Working knowledge of digital signal processing.
Extensive VHDL or Verilog firmware programming capability, and having applied that knowledge on an FPGA device (Xilinx, Client, Microsemi).
Having utilized Xilinx Vivado, Client Quartus, or Microsemi Libero development platforms to successfully build and test an executable hardware implementation of code which they have written.
Use of the Mentor Questa HDL simulator, including UVM verification techniques.
Experience with MATLAB modeling is a plus.
Higher level code development, including Nvidia CUDA, OpenCL, Simulink HDL Coder, and Xilinx System Generator are also a plus.
Hourly Pay Rate Ranges:
Level 3 Rate: *** to ***
Level 4 Rate: *** to ***
Interim Secret Clearance is Required to start.
Recommended Skills
- Construction Management
- Construction
- Petrochemical
- Refinery
- Renovation
- Installations (Manual/Mechanical)
Electrical Engineering Intern
Novelis Oswego Manufacturing Facility -
Oswego, NY
Electrical Engineer
Actalent -
Fayetteville, NY
Electrical Engineer
Barton & Loguidice DPC -
Liverpool, NY
