Fresh Consulting is a design-led, software development and hardware engineering company, offering end-to-end digital services to help companies innovate. We bring together amazing UX designers, sophisticated developers, digital strategists, and top-notch engineers to help companies create fresh experiences that connect humans, systems, and machines. We’ve been growing fast and need someone to help us continue to manage the delivery of high-quality work in a fast-paced environment.
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Title: Silicon Digital Design Engineer
Duration: 6 months with possible extension
Location: Austin, TX
Benefits: Employee benefits at 100% including Medical, PTO, Holiday Pay, 401K Plan and much more!
Hours: Minimum 40 Hours/Week
Must be onsite. Proof of vaccination is required.
Role:
• Contribute to the development emulation models and automation infrastructure.
• Integrate new IP and transactors into existing emulation models.
• Create and debug embedded C firmware tests to validate model features.
• Understanding of full-chip design verification and post-Si validation concepts.
• Create automation and regression flows using Python.
• Triage, debug, and fix emulation build and runtime failures.
• Work with FPGA engineers to perform early prototyping.
Skills:
• Experience with one of the main hardware emulator platforms (Synopsys ZeBu, Mentor Veloce, or Cadence Palladium).
• Experience building emulation models from RTL drops, integrating transactors, and architecting/implementing emulation testbenches.
• Familiarity with Verilog, SystemVerilog coding.
• Experience with embedded C firmware testing.
• Fluency in a high level programming language such as Python.
• Expertise in C/C with hands-on experience of writing drivers, middleware, board support packages and boot loader.
• Good understanding of ARM based SoCs. Experience influencing design and Silicon validation teams to optimize the usage of Pre-Silicon (FPGA and Emulation) Prototype platforms.
• 3 years of experience in leading silicon validation planning, execution, validation FW development, and validation signoff.
• Knowledge of ASIC design flow, silicon foundry test flow, and silicon FW development process.
• 4 years of experience in emulation, prototyping, verification, or similar.
• Experience in RTL coding, synthesis and/or SoC Integration.
• BS Electrical Engineering/Computer Science or equivalent experience.
• Experience with UPF based simulation flow.
• System Verilog OVM/UVM experience.
• Tcl and Python (or similar) scripting experience.
• Experience in SoC integration and ASIC architecture.
Preferred Skills:
• Experience using High Speed interfaces like PCIe, USB, MIPI.
• FPGA design.
• Experience with RTL-based power estimation flows.
• MSEE/CS or equivalent experience.
• Portable stimulus (PSS)
Education: BSEE, BSCSE or related or equal years of experience.
FRESH--
- Work on engineering and research assignments with F500 companies and startups.
- The relationships that we have created with our clients are one of a kind.
- We help solve problems in many technologies focusing on R&D, product development, and manufacturing.
- We work at the most cutting-edge and latest technologies from AR/VR to Autonomous technologies.
- Closely working with our clients, we believe that long term investments are extremely important to maintain the culture we together have created.
We’re a handpicked team of Engineers, digital strategist, designers, and developers united together in creating a fresh experience. Whether we are strategizing, designing, developing, or analyzing, our integrated team works as an extension of yours to improve your impact, your usability, and your customer conversion. In the process, we collaborate with you to get to know your business, understand your industry, and incorporate your big ideas into memorable experiences that keep your customers coming back for more.
Fresh Consulting is a participating E-Verify company.
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