What are the responsibilities and job description for the PCIe IP Lead position at INTEL?
Job Description
Come work with one of the largest engineering companies in the world. Intel is a global leader, creating world-changing technology that enables progress and enriches lives. We are at the intersection of several technology inflections such as artificial intelligence, 5G network transformation, and the rise of the intelligent edge, that together will shape the future of technology.
In this role, the incumbent will design, develop, validate, or debugs software abstractions and frameworks for acceleration with FPGAs to support embedded, data center, and communication clients. The IP Design Lead role calls for expertise in design methodologies, architecture. Close collaboration with the micro-architect and design teams to develop robust design strategy, which is highly scalable across multiple generations of IP. Capacity to work with and respond to requests from various internal teams across multiple sites is required.
Your responsibilities will include, but are not limited to:
- Ensuring the logical design of an IP/subsystem/SoC/ADP satisfies the architectural specification.
- Defining and optimizing the design choices, tools, and methodologies.
- Analyzing microarchitectural features to identify possible problem areas.
Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Education requirements:
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science.
- Masters' degree in Electrical Engineering, Electrical Electronics or Computer Engineering.
Minimum Qualifications
10 years of relevant experience, experience should include:
- Design experience (RTL Design, micro-architecture definition).
- Experience in synthesis, power, performance, and timing convergence.
- Experience with scripting languages (e.g., Perl, Python, Shell, etc.)
Preferred Qualifications:
- End-to-end System level experience including design, software, firmware, and hardware
- Experience working with customers and their systems and providing optimized solutions.
- Experience in memory or cache coherency designs.
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Other Locations
US,TX,Austin;US,CA,Santa Clara
Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in US, California: $156,410.00-$250,410.00
*Salary range dependent on a number of factors including location and experience
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Come work with one of the largest engineering companies in the world. Intel is a global leader, creating world-changing technology that enables progress and enriches lives. We are at the intersection of several technology inflections such as artificial intelligence, 5G network transformation, and the rise of the intelligent edge, that together will shape the future of technology.
In this role, the incumbent will design, develop, validate, or debugs software abstractions and frameworks for acceleration with FPGAs to support embedded, data center, and communication clients. The IP Design Lead role calls for expertise in design methodologies, architecture. Close collaboration with the micro-architect and design teams to develop robust design strategy, which is highly scalable across multiple generations of IP. Capacity to work with and respond to requests from various internal teams across multiple sites is required.
Your responsibilities will include, but are not limited to:
- Ensuring the logical design of an IP/subsystem/SoC/ADP satisfies the architectural specification.
- Defining and optimizing the design choices, tools, and methodologies.
- Analyzing microarchitectural features to identify possible problem areas.
Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Education requirements:
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science.
- Masters' degree in Electrical Engineering, Electrical Electronics or Computer Engineering.
Minimum Qualifications
10 years of relevant experience, experience should include:
- Design experience (RTL Design, micro-architecture definition).
- Experience in synthesis, power, performance, and timing convergence.
- Experience with scripting languages (e.g., Perl, Python, Shell, etc.)
Preferred Qualifications:
- End-to-end System level experience including design, software, firmware, and hardware
- Experience working with customers and their systems and providing optimized solutions.
- Experience in memory or cache coherency designs.
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Other Locations
US,TX,Austin;US,CA,Santa Clara
Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in US, California: $156,410.00-$250,410.00
*Salary range dependent on a number of factors including location and experience
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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