What are the responsibilities and job description for the Performance Architect position at INTEL?
Job Description
Join Intel's DAPPP Group as a Performance Architect! The DPA group architects products that deliver leadership performance, performance efficiency and security for traditional as well as new paradigms for data centric computing in the datacenter and edge with the right balance of leadership technologies and IPs for computing, interconnect, memory and quality delivered through the best mix of silicon, packaging and platform solutions.
The Performance Architect is responsible for determining, specifying and evaluating the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly.
The Performance Architect also:
- Designs framework for particular functions.
- Defines, documents and tests processes for inclusion into technical platforms, subsystem specifications, input/output and working parameters for hardware and/or software compatibility.
- Identifies, analyzes and resolves subsystem and/or SoC design weaknesses.
- Influences the shaping of future products by significantly contributing to the architecture used across design families.
- Provides multilayered technical expertise for next generation initiatives.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or Computer Science and 3 years of experience -OR- a Master's Degree in Electrical/Computer Engineering or Computer Science and 2 years of experience -OR- a PhD in Electrical/Computer Engineering or Computer Science and:
- Pre-silicon performance model with silicon performance
- C, C or Python
- Verilog, System/Verilog
Preferred Qualifications
- CPU field experience
Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Other Locations
US,Santa Clara
Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in US, California: $102,540.00-$153,580.00
*Salary range dependent on a number of factors including location and experience
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Join Intel's DAPPP Group as a Performance Architect! The DPA group architects products that deliver leadership performance, performance efficiency and security for traditional as well as new paradigms for data centric computing in the datacenter and edge with the right balance of leadership technologies and IPs for computing, interconnect, memory and quality delivered through the best mix of silicon, packaging and platform solutions.
The Performance Architect is responsible for determining, specifying and evaluating the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly.
The Performance Architect also:
- Designs framework for particular functions.
- Defines, documents and tests processes for inclusion into technical platforms, subsystem specifications, input/output and working parameters for hardware and/or software compatibility.
- Identifies, analyzes and resolves subsystem and/or SoC design weaknesses.
- Influences the shaping of future products by significantly contributing to the architecture used across design families.
- Provides multilayered technical expertise for next generation initiatives.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or Computer Science and 3 years of experience -OR- a Master's Degree in Electrical/Computer Engineering or Computer Science and 2 years of experience -OR- a PhD in Electrical/Computer Engineering or Computer Science and:
- Pre-silicon performance model with silicon performance
- C, C or Python
- Verilog, System/Verilog
Preferred Qualifications
- CPU field experience
Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Other Locations
US,Santa Clara
Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in US, California: $102,540.00-$153,580.00
*Salary range dependent on a number of factors including location and experience
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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