This position is within MCU/MPU SoC Implementation organization, and specifically in the Advanced Technology Exploration Group. This Design group responsible for New technology exploration and Performance, Power and Area (PPA) analysis of complex IP and sub-systems in High Performance Processors and Advanced Microcontrollers within NXP. The candidate will be working on the fast paced, and leading edge advanced node technologies building exciting and complex SoCs. Will be a major influencer in the development and support of the SoC implementation Organization's charter to build world-class MCU/MPUs.
Job Summary:
1.Collaborate with cross-functional architecture & technology development teams, providing them with detailed technical studies and recommendations of new IP and technologies critical for creating differentiating and unique product solutions.
2. Benchmark processors, accelerator cores, interconnect & DDR systems and other digital IP for performance, power, and area (PPA) tradeoffs and determine the correct balance for a given product type.
3. Perform competitive analysis studies involving both internal and external IP to determine current and project future state-of-the-art PPA metrics.
4.Design and execute Synthesis and Place and Route experiments in advanced nodes utilizing a complete RTL to GDS Flow for both Internal and 3rd-party IP PPA evaluation
5. Evaluate clocking, timing closure, power reduction, and PDN signoff solutions while collaborating with design and execution teams to integrate those new solutions into the product development flows.
6. Developing specifications for both internal and 3rd-party IP, participating in make vs. buy analysis, and selecting the right IP.
Key Challenges:
1. Experience in designing or architecting complex SoCs in leading-edge process nodes with multiple independent compute environments.
2. Track record of assessing performance, power, and area tradeoffs and determining the correct balance for a given product type.
3. Deep knowledge of ARM architecture specifications.
4. Experience in EDA flows for Synthesis and Place & Route
5. Experience in defining IP components and coding RTL to implement digital control wrappers
6. Exposure to ISO26262-compliant and mixed-criticality architectures.
Cross functional aspects:
Will be working with various Technology, Design and IP teams within various groups in NXP
Job Qualifications:
* BS in Electrical Engineering, Computer Engineering, or Computer Science with 15 or more years of experience
* MS in Electrical Engineering, Computer Engineering, or Computer Science with 12 or more years of experience
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
Recommended Skills
- Architecture
- Computer Engineering
- Electrical Engineering
- Experimentation
- Information Technology
- Metrics