What are the responsibilities and job description for the ASIC Digital Design Engr, I position at Synopsys?
47507BR
USA - Williston - Vermont
Job Description and Requirements
Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
ASIC Memory Design Engineer
We're looking for a Non-volatile Memory (NVM) design Engineer to join our team. Work directly with analog & digital experts to create customized digital solutions that will be fabricated, tested, and implemented into high volume applications.
We have mixed-signal product development in every node from 0.35um to 5nm and support all top tier foundries and customers. Come work with the leading innovator in this exciting field.
If you are a self-starting individual-contributor looking to expand their career potential, please contact us immediately.
Required Skills
- RTL / Verilog / System Verilog coding
- SOC design and digital tool flows execution
- Digital Verification
- Scripting
- Excellent written/verbal communication
Desired Experience / Skills
- Verification (model / verification test-bench / score-boarding creation and maintenance)
- Verification debug / root cause
Tools
- Custom Compiler / Design Compiler / Fusion Compiler
- VCS / Verdi / DVE
- Nanotime & Overall digital tool flows
Education
- Minimum of BSEE / CompE or equivalent
Experience
- New Graduates or 2 years of industry experience in digital ASIC design
Roles & Responsibilities
Work collaboratively with analog, CAD, layout, and test teams in the following areas:
- IP
- Create and validate RTL for IP, NVM controllers and test chip (SOC)
- Synthesize, Place, and Route IP, NVM controller and test chip (SOC)
- Design Kit
- Create behavioral model for NVM IP for customer implementation
- Validate .lib and other digital views
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Job Category
Engineering
Country
United States
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Base Salary Range
$66,000-$115,000.00
Synopsys maintains a workplace where all personnel, customers, and vendors are treated with dignity, fairness, and respect. We maintain worldwide policies in our Work Rules Policy, which is applicable to all employees in furtherance of these principles. We pride ourselves on providing a healthy and productive work environment that is free from discrimination and harassment based on race, color, religion, gender, gender identity, sexual orientation, marital status, veteran status, age, national origin, citizenship, ancestry, physical or mental disability, pregnancy, medical condition, and any other characteristic protected by law. For applicants and employees with disabilities, we also make reasonable accommodations consistent with applicable laws and regulations. We are each expected to do our part to create a healthy and productive work environment for everyone. This includes bringing issues to management’s attention when you believe certain conditions are distracting from a good work environment. Our Work Rules Policy also allows you to raise concerns with other Synopsys managers. If employees are still unable to resolve their concerns, their disputes may be resolved through our Internal Issue Resolution Process Policy. In addition, all managers and employees in positions of authority have a special obligation to maintain and support a healthy and productive work environment.
