Hardware SI/PI Engineer

Enfabrica
Mountain View, CA Full Time
POSTED ON 1/25/2023 CLOSED ON 4/16/2023

What are the responsibilities and job description for the Hardware SI/PI Engineer position at Enfabrica?

Summary

Join an ambitious, experienced team of silicon and distributed systems experts as a hardware board and system signal integrity engineer. You have the opportunity to build a groundbreaking new category of product that revolutionizes the performance and scalability of next-generation distributed computing systems, and to help solve key infrastructure challenges facing our customers.

We are looking for talented, motivated candidates with experience building groundbreaking, novel computing and networking systems for large-scale distributed computing environments, and who are looking to grow in a fast paced, dynamic startup environment. 

Default location is Mountain View, CA, but we are equally open to remote candidates.

 

Roles & Responsibilities

  • Work with substrate layout engineer and PCB layout engineer on trial layouts for 100G Ethernet, PCIe Gen5 and DDR5 interfaces
  • Pre-layout SI and PI modeling for 100G Ethernet, PCIe Gen5 and DDR5 blocks
  • Build the set of physical design rules used for both the SOC package substrate and the PCB design. Inputs to this effort include pre-layout SIPI simulation, detailed IP specifications, and vendor manufacturing rules, particularly for high speed interfaces.
  • Work with substrate layout engineer and PCB layout engineer to ensure final layout meets high speed interface SIPI specifications
  • Post layout SIPI modeling of the substrate and PCB for 100G, PCIe and DDR5 interfaces
  • SerDes channel simulation for 100G Ethernet and PCIe Gen5 serial interfaces
  • COM simulation
  • PI transient simulation to ensure SOC meets target impedance criteria and noise ripple spec 
  • 100G SerDes and PCIe Gen5 compliance test for SOC
  • PVT characterization of 100G Ethernet, PCIe Gen5, and DDR5 interfaces
  • Validate new types of connectors for CXL system applications such as CDFP and CEM-X

Key Qualifications

  • Minimum 10 years experience in SI and PI in SOC and system design
  • Understand electromagnetic field and transmission theory
  • SIPI design experience with 100G Ethernet, DDR5, and PCIe Gen5 interfaces is preferred
  • Proven tracking record delivery high quality SIPI simulation and validation/characterization for server, storage and networking switch products
  • Fluent with modeling tools such as PowerSI, SiWave, HFSS, ADS, Hspice and Matlab
  • Familiar with Matlab and IEEE802.3CK COM simulation 
  • Familiar with real time scope, sampling scope, VNA and TDR
  • Hands on experience on 100G Ethernet and PCIe Gen5 compliance test fixtures and test equipment
  • Strong hands on experience: debugging and solving issues is a must in the fast paced and small team environment
  • Good team player and work with other disciplines in software, board designer, thermal and mechanical fields
  • Script coding skill to increase bring up and test productivity 
  • Minimum bachelor degree in electrical engineering

 

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