What are the responsibilities and job description for the System Architect position at Graphcore?
Founded just over five years ago, Graphcore's growth and impact has been little short of staggering. We believe we're in a unique position as a new wave of machine learning technology begins to emerge. We see a world where technology enhances human potential and takes us into a new era of intelligence and progress that everyone can benefit from.
What we can achieve over the next few years will re-shape businesses around the world.
Graphcore has created a completely new processor, the Intelligence Processing Unit (IPU), specifically designed for artificial intelligence. The IPU’s unique architecture means developers can run current machine learning models orders of magnitude faster. More importantly, it lets AI researchers undertake entirely new types of work, not possible using current technologies, to drive the next great breakthroughs in general machine intelligence.
We are seeking a senior and experienced system and SoC architect to join the Silicon Systems Architecture Team at Graphcore. The team defines the silicon architecture for multiple Graphcore silicon devices which together enable construction of the world’s largest and most powerful Machine Intelligence super-computers. Our architecture work spans a wide spectrum of areas including but not limited to, low level physical interfaces for high speed links and memory, on-chip and off-chip multi-terabit interconnects at various scales, PCI Express, shared memory systems, control plane architecture, security and multi-processor arrays.
Accordingly, we are seeking candidates with deep experience in some of these areas to contribute to the definition of future Graphcore products.
The ideal candidate will have strong interest and in-depth experience in some of the following:
- Digital/ASIC microarchitecture, RTL coding and verification
- On-chip interconnect, network on chip, queued communications
- Off-chip interconnect, PCI Express, High Speed Ethernet, Networking, RDMA
- 100 Gbit SERDES, Physical Coding Sublayers, High speed memory interfaces (DDR4/5, LPDDR, HBM)
- Hi Speed Encryption, Security, virtualisation and Data Centre hardware infrastructure
- Super-computing/HPC
Required experience is:
- Expert Python
- Experience building architectural models of silicon systems
- Proficient with modern version control systems such as git
- Highly developed written communication skills required for authorship of complex yet clear design specifications
- Experience in working on real hardware in a lab/silicon bring-up environment
The successful candidates will be working on delivering one of the world’s most complex and capable Machine Intelligence accelerators and the super-computers built from them, and will build an understanding of how cutting edge machine intelligence applications are deployed at scale. This role will be central to the definition of future IPU generations at chip and system level and therefore to the evolution of large scale machine intelligence.
Benefits
In addition to a competitive salary, we also offer a generous pension scheme and to support your well-being we provide health insurance, life cover and an employee assistance programme.
Our centrally located Bristol office provides a well-stocked kitchen with healthy food, drinks and snacks and our very own barista! We have an active social scene too - from cycling, yoga, running and football right through to a board game group.
We welcome people of different backgrounds and experiences and are committed to building an inclusive work environment that makes Graphcore a great home for everyone. We are an equal opportunity employer and want to build a work environment where everyone is happy, productive and respectful. If you have a disability or additional need that requires accommodation, just let us know.