ASIC Engineer (Verification & Test)

SoC Engineer - Verification and Test

At Niobium Microsystems, we develop high performance microelectronic products to enable the secure collection, processing, and distribution of critical data. We are a trusted partner for DoD and commercial customers whose solutions require lower power, higher efficiency, and proven security.

Founded as a 2021 spinout from a world-class security and computing systems R&D company, our team combines decades of experience in advanced semiconductor design with experience in advanced cryptography. Niobium is headquartered in Dayton, Ohio with additional locations in Portland, OR; Denver, CO; San Diego, CA; and Columbus, OH. The preferred location for this position is Columbus, Ohio but we will not be limited by geography for the right candidate.

Our values are at the heart of every decision we make and we understand that each member of our talented team is the key to our on-going success. For those reasons, we've designed a highly competitive benefits program to support employees and their families. These include: 

• Competitive salaries scaled based on experience
• Employer paid health care
• Employer contribution to health savings account
• Flexible time off
• Flexible work location with remote options
• 401K employer match

POSITION DESCRIPTION /

Niobium microsystems is seeking a talented and motivated SoC Verification and Test Engineer to join our expanding team. The ideal candidate will have hands-on experience working in a lab environment, utilizing oscilloscopes, logic analyzers, and other digital ASIC testing equipment. Additionally, they should be proficient in digital verification using SystemVerilog and Universal Verification Methodology (UVM).

As an SoC Engineer, you will collaborate with a small, highly skilled team of engineers. Your responsibilities will include researching, designing, and implementing novel methodologies and architectures. Given our team’s size, you’ll have the opportunity to contribute to all aspects of SoC design, verification, and implementation. We value individuals who possess strong problem-solving abilities and are eager to learn new processes and tools.

JOB RESPONSIBILITIES /

Primary Responsibilities:

• Perform functional and performance testing of Fully-Homomorphic Encryption (FHE) accelerator ASIC.
• Collaborate with design and architecture teams to identify and resolve issues.
• Utilize oscilloscopes, logic analyzers, and other testing equipment to validate designs.
• Investigate and debug failures, providing detailed reports to the team.
• Develop and execute verification plans for digital designs using SystemVerilog and UVM.
• Create and maintain testbenches, test cases, and test vectors.
• Contribute to the development of novel methodologies and verification techniques.

DESIRED SKILLS & EXPERIENCE /

Required Skills:

• • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
  • Minimum of 3 years of hands-on experience in SoC verification and testing

• Hands on experience with lab testing equipment such as oscilloscopes, power supplies, logic analyzers

• Programming experience using C, C , and/or Python

• Experience using common debug protocols such as I2C, SPI, and JTAG

• Experience with high-speed interfaces such as PCIe and DDR

• SoC testbench development, constrained random testing, and debugging
• Familiarity with digital design concepts and ASIC development flow
• Strong analytical and problem-solving skills
• Excellent communication and teamwork abilities

Preferred Skills:

• Advanced degree (Master’s or Ph.D.) in Electrical Engineering, Computer Engineering, or related field

• Experience writing test plans and feature lists

• Proficiency in SystemVerilog, Universal Verification Methodology (UVM), and/or SystemVerilog Assertions (SVA)

Bonus Skills:

• • RTL Design using Chisel, VHDL, and/or SystemVerilog
  • Experience with RISC-V architecture, AXI, AMBA, and TileLink

• PCB and/or Package Design experience

• Experience with DFT methodologies including scan insertion
• Hardware Emulation and/or Hardware/Software co-simulation
• Logic synthesis and static timing analysis
• Timing constraint development, clock tree synthesis and timing closure
• Signoff flows including timing, signal integrity and power integrityExperience with multi-clock/multi-power domain designs
• Experience with Synopsys tools flow including DC, ICC2, ICV, PT
• Power domain design and analysis methodologies (UPF)
• Asynchronous Logic design techniques
• Physical verification skills (DRC, LVS, ERC, DFM)
• Ability to create and extend automation flows (RTL to GDSII)

CONTACT /

careers@niobiummicrosystems.com

444 E 2nd Street, Suite 250, Dayton, OH 45402

niobiummicrosystems.com