Senior Engineer, Advanced Packaging Feasibility Layout Design

What You’ll Do

Senior Engineer, Advanced Packaging Feasibility Layout Design provide project management, package design/development and sustaining support for integrated circuit or semiconductor assemblies, various other electronic components and/or completed units.  Mission of the Packaging Solutions Center is to find package solutions beyond Silicon to make next performance systems considering power and cost and to tackle the difficult and hugely innovative task with the industry, focusing on Advanced Packages such as 2.5D, 3D, and 3.5D.

You will be responsible for the electrical design of electronic packages related to Samsung’s High-end Advanced Packages, Packaging (ex: SiP, 2.5D, 3D, 3.5D, etc.). This position requires someone comfortable with the many aspects of advanced packaging, and who enjoys the challenge of leading integration driven innovations across geographically disperse teams in pursuit of taking advantage of Advanced Packaging, focused on electrical design.  

Location: Onsite at our San Jose office/headquarters 3-5 days a week with an average of 10% travel per year

Reports to: Corp Executive VP, Packaging Development 

Job #: 41658

• Responsible for the electrical design of electronic packages.
• Able to do packaging layout designs from scratch.
• Enjoy path-finding for optimizing advanced packaging layouts.
• Able to create IC package substrate layouts of 2.5D/3D advanced packaging.
• Responsible for the advanced packaging design flow set-up, and design tool bring-up.
• Performs custom physical design and design flow development, APR tools, and multi-chip design validation.
• Design and develop a package and interconnect methods in the areas of SiP/modules, wafer level, and multi-chip module.
• Collaborate with thermal engineers, mechanical engineers, and electrical engineers for feasibility study
• Complete other responsibilities as assigned.

What You Bring

• Bachelors in Electrical Engineering, Mechanical Engineering, Materials Science or Physics with 5 years of experience or Masters in Electrical Engineering, Mechanical Engineering, Materials Science or Physics with 3 Years of Industry Experience or PhD in Electrical Engineering, Mechanical Engineering, Materials Science or Physics with 0 yrs of Industry Experience Preferred.
• Strong technical background in design and electrical analysis.
• Understand packaging technology and product.
• Understand the interaction of Silicon Chip, Package, and Board.
• Expert in package design tools: Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP), and/or Siemens Xpedition platform tools (XPD/XSI/XLM).
• Experience and knowledge of assembly, electrical simulation, process, test, and characterization techniques would be an added advantage.
• Strategic thinking to draw insights from analysis and drive action. Excellent communication, inter-personal and presentation skills
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

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