Verification Engineer Salary at Plda Inc BETA

Location: Mountain View, CA (Preferred)/ Can be considered remote. Job Description: What candidate will Be Doing: At-least 10+ years of experience in System Verilog HVL and C++/C At-least 10+ year of experience in UVM. Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure. Proficient in SVTB/UVM, C++ testbench Understand DSP is a plus Subversion for Repository and Bugzilla is also a Plus Proficient in debug and assertions coding Verification closure with team What We Are Looking For: At-least 8+ years of experience in System Verilog HVL and C++/C At-least 8+ year of experience in UVM. Make/Perl/Python / any script Any protocol experiace is fine Ensure customer satisfaction. Reporting to customer on daily or weekly progress effectively What’s In It for You: At Arrow, we recognize tha

We are seeking a Talented Verification Test Engineer, driving robustness of software, firmware, and algorithms. Primary Duties: Develop comprehensive test plans and test cases for medical device software, firmware, and algorithms based on product requirements and specifications Design and implement automated tests and frameworks for regression testing and continuous integration Perform manual testing of new features and interfaces Document and track defects, analyze root causes, and follow up on fixes Develop and execute exploratory tests to identify defects and potential risks Create and maintain test data to be used for testing procedures Evaluate product quality and reliability by analyzing test results Provide timely feedback to developers and project managers on product quality, defects, risks, and potential improvements Stay up-to-date with medical device testing standards, methodologies, tools, and industry best practices Knowledge, Experience, and Skills Bachelor’s Degree in Co

Role: Software Verification Engineer Location: Detroit - On-site Rate: Dependent on each consultant Initial 12 month contract (W2/1099/C2C) US Citizenship required Start Date: Immediate As a global consultancy group operating across life sciences, tech, defence and engineering. We are now seeking an experienced Software Verification Engineer. This will be an initial 12 month contract. Experience: Over 4+ years experience within Software Verification Experience in either Automotive or Aviation industry - Experience with DO-178 highly desirable Experience working on test cases, test procedures, automated testing & requirements development Desirable Experience with PXI Systems or D-Space, if no experience with either, experience with LabVIEW/ TestStand Working on DAL A or DAL B projects My client is offering great rates of pay for the right consultant and it defiantly isn’t something to be missed out on. If you would be interested in hearing more, please apply with your latest resume and

Join Mercury Systems as a System Verification Engineer – Madrid, Spain Are you passionate about testing high-performance avionics and defense systems? Mercury Systems is expanding its test team between Madrid and Geneva, and we’re looking for a System Verification Engineer to play a crucial role in ensuring safe flight operations and top-tier performance. About Mercury Systems Mercury Systems is a leading American company with a strong presence in Switzerland, the UK, and Madrid. In our Madrid office, we specialize in designing and manufacturing mission-critical avionics and defense computers equipped with multiple processors, real-time operating systems, and advanced interfaces such as video, data buses, GPIO, and analogues. Your Mission You will be responsible for verification and validation activities, ensuring our systems meet the highest standards of reliability and performance. This role requires defining test strategies, writing test cases, developing test scripts and automation

Job Title: Senior Hardware Verification Engineer Location: Santa Clara, CA About the Role: We are seeking a seasoned Design Verification designer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions Responsibilities: Collaborate with design and architecture teams to create test plans for highly configurable IPs meant to provide interconnectivity between components across an SOC, chiplet or multi chiplet systems Write UVM/SystemVerilog code to implement the test plan, checkers and scoreboards Collaborate with software teams to define and implement configurable testbenches Work with design and DV engineers to implement the test plan, debug failures, close coverage, etc. Qualifications: BS/MS in Electrical Engineering, Computer Engineering or Computer Science 8+ years and current hands-on experience in block-level/IP-level

PLEASE HAVE CURRENT EDA/SEMI TYPE EXPERIENCE! ASIC Design Verification Engineer – UVM specialist, Bay area #8016 In this role, you will not be doing “Design Verification”, but you need to have verified designs or been deeply involved in the process. My client is a very promising well-funded startup at the cutting edge of integrating LLMs with chip design. Their team is composed of experts in the fields of AI, software development, and semiconductor design. The founders have an amazing background and pedigree, perfect for this venture. This totally new approach to chip design is a game changer and with their strong foundation and existing customer base, they are positioned to redefine the landscape of chip design. Job Description: They are looking for skilled and passionate Verification Engineers or Chip Designers who have significant experience with VLSI front-end design flows, specifically UVM, to collaborate closely with their ML and software teams. In this unique role, you will appl

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-performance FPGA solutions. Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and embedded FPGA (eFPGA) solutions in high-volume production. Achronix's FPGA and eFPGA IP offerings are further enhanced by ready-to-use PCIe accelerator cards targeting AI, ML, networking and data center applications. All of Achronix's products are supported by best-in-class EDA software tools. Job Description/Responsibilities The successful candidate will contribute to the verification and validation of FPGA cores and related ASIC subsystems implemented in modern FPGA technology nodes (7nm and below). Responsibilities include the following: Verify ASIC logic subsystems developed for high-speed networking and data center applications for inclusion in modern FPGAs Define, draft and review verification documents and testplans in collaboration wi

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 114,000 colleagues serve people in more than 160 countries. Job Title Staff Systems Verification Engineer Working at Abbott At Abbott, you can do work that matters, grow, and learn, care for yourself and family, be your true self and live a full life. You’ll also have access to: Career development with an international company where you can grow the career you dream of. Free medical coverage for employees* via the Health Investment Plan (HIP) PPO An excellent retirement savings plan with high employer contribution Tuition reimbursement, the Freedom 2 Save student debt program and FreeU education benefit - an affordable and convenient path to getting a bachelor’s degree. A company recognized as a great