SOC Design Engineer Salary in Montana

Location field must contain 'city, state' or a zip code to perform a radius search (e.g., Denver, CO or 46122 ). City and state must be separated by a comma followed by a space (e.g., Houston, TX )Intel SOC Design Engineer - Physical design and Integration in Charleston , West Virginia Job DescriptionCome join Intel's Client Engineering Group, responsible for designing Client SOCs that make up more than half of Intel's annual revenue. We envision the future of computing and design for the next generation of laptop and desktop computers.We are looking for an SoC (System on Chip) Physical Design Engineer, ready to research, design, develop, and test lead Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. This role is within Intel's highly-regarded Devices Development Group, headquartered in Portland, Oregon with additional sites in Penang, Malaysia, and Bangalore, India. Our bold purpose as a company is to 'create world-changing technology that en

TetraMem is a fast-growing venture-backed well-funded startup company working on the next generation computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions from software to hardware. In this team you be part of a world-leading IC design team responsible for the development and deployment of hardware solutions for a revolutionary computing system, which we believe can bring up the energy efficiency by another two orders of magnitude, and completely changes the AI IoT industry. It is based on our unique computing memory device, which has SoTA bit-level per cell, nonvolatile, excellent retention, and endurance. We offer a very competitive compensation and benefits package (including medical, unlimited PTO, and 401k) that commensurate with experience. Pay Range: $110,000 - $250,000 ASIC RTL/SoC Design Engineer Requirements: ● MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design ● E

Description Job Title: Sr Principal Engineer - Hardware Design Job Location: San Jose, CA Job ID: AI2300 Job Description: As a Sr Principal Engineer - Hardware Design engineer, you will help develop timing constraints and synthesis flow for SiMa.ai's MLSoC™. Your responsibilities will include develop a framework for timing constraints development and validation and synthesis including creating guideline documents, scripts and methodologies. This means working very closely with the design team, DFT team and back-end teams. The primary design target is an SoC ASIC, with machine learning being a key component. Role & responsibilities: Synthesis and STA constraint development and validation at block level and top level Synthesis methodologies and scripts Static timing analysis Design methodology, micro-architecture, RTL Work with the back-end team on netlist/RTL and constraint delivery Work with the back-end team to develop block level and top level STA constraints. Minimum Requirements: M

Wireless SoC Design Engineer San Diego,California,United States Hardware Come join Apples growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply. **Key Qualifications** + Proficient in digital design fundamentals, with a strong foundation. + Skilled in defining ASIC microarchitecture to meet functional requirements whi

Wireless SoC Design Engineer Irvine,California,United States Hardware Come join Apples growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply. **Key Qualifications** + Proficient in digital design fundamentals, with a strong foundation. + Skilled in defining ASIC microarchitecture to meet functional requirements while

Intel SOC Design Engineer - Physical design and Integration Providence , Rhode Island Apply Now Come join Intel's Client Engineering Group, responsible for designing Client SOCs that make up more than half of Intel's annual revenue. We envision the future of computing and design for the next generation of laptop and desktop computers.We are looking for an SoC (System on Chip) Physical Design Engineer, ready to research, design, develop, and test lead Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. This role is within Intel's highly-regarded Devices Development Group, headquartered in Portland, Oregon with additional sites in Penang, Malaysia, and Bangalore, India. Our bold purpose as a company is to 'create world-changing technology that enriches the lives of every person on earth' and this role is instrumental in furthering our mission to shape the future of technology.Your responsibilities may include but not be limited to:SoC, clock design