Design Verification Engineer with Design Skills Salary

How much does a Design Verification Engineer with Design skills make in the United States? The average salary in the United States is $80,917 as of March 26, 2024, but the range typically falls between $73,755 and $88,280. Skills can impact your salary greatly depending on many important factors, including education, certifications, additional skills, the number of years you have spent in your profession. With more online, real-time compensation data than any other website, Salary.com helps you determine your exact pay target.

Base Salary

Core compensation

$73,755
$88,280
$80,917
Job Openings for Design Verification Engineer
Senior Design Verification Engineer Location: Austin, Texas About Company : Tessolve Semiconductor is a leading provider of semiconductor engineering solutions, offering a comprehensive suite of ...
LinkedIn - 6 days ago
Intelliswift Software - Redmond , WA
Role: Hardware Engineer IV (Design Verification Engineer IV) Location: Redmond, WA Job Term: 12 months contract with possibility of extension (on W2) Must-Have Skills: * Proven experience in ...
LinkedIn - 5 days ago
OPENEDGES Technology, Inc. - San Jose , CA
Design Verification Engineer OPENEDGES is the world's only total memory system and AI platform IP solution company that has delivered NPU, memory controllers, DDR PHY, and on-chip interconnect IPs ...
LinkedIn - 6 days ago
Quest Global - San Jose , CA
Senior Design Verification Engineer Join the Quest Global as a Senior Design Verification Engineer for the most cutting-edge work. Quest Global assists its customers in developing their next ...
LinkedIn - 12 days ago
Trispoke managed services - Denver , CO
FPGA Design/Verification Engineer Job Duration: 06 months Contract on W2 Job Location: Littleton/Waterton, CO (HYBRID). Note: US Citizen required for this position Job Description: Work with low SWaP ...
ZipRecruiter ATS Jobs for ZipSearch/ZipAlerts - 4 days ago
ACL Digital - El Segundo , CA
Elect Design and Analy Engr 3 (Title- ASIC/FPGA Design Verification Engineer with UVM Experience) Location- El Segundo, CA-(100% Onsite) Duration: 6 Months, (Possible extension) Manager highly likely ...
LinkedIn - 1 day ago