FPGA Design Verification Engineer - Clearance Eligible with Security Clearance - Now Hiring

FPGA Design Verification Engineer - Defense - 9/80 schedule - Opportunity to advance This Jobot Job is hosted by: Alexa Holz
Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume.
Salary: $120,000 - $170,000 per year A bit about us: We offer competitive pay, benefits, and important work-life balance initiatives including every other Friday Off, Flextime, and Telecommuting. Salary 140k-150k This position requires an active Secret or Top Secret clearance going into the job! This is an on-site position at the following locations:
Austin, TX
NYC, NY
Patterson, NY
Burlington, MA
Manassas, VA
Arlington, VA
San Diego, CA
Manchester, NH
Huntsville, AL Why join us? Picture yourself developing advanced electronic systems deployed to protect members of our armed services on some of the nation's most sophisticated aircraft. Pretty rewarding, right? And now imagine doing that job while working in a fast-paced environment using state-of-the-art tools and methodologies, all the while increasing your knowledge, growing your skills, and advancing your career. Job Details Required Skills and Education * Bachelor's Degree and 6 to 10 years work experience (or equivalent experience)
* Experience planning, architecting, developing, and using constrained random, self-checking test benches in SystemVerilog 8 plus years/UVM, OVM, and/or VHDL
* Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence)
* Proven track record of managing and executing schedules, and driving tasks to closure. Candidates should also be comfortable multitasking because they may be asked to support multiple projects.
* Strong communication and documentation skills
* Experience developing and implementing test plans.
* Ability to work effectively in a multi-site or borderless environment
Preferred Skills and Education
The following skills/experience are preferred, but not required: * Perl/Python
* C /Java
* Git/Jira/BitBucket
* Digital Signal Processing * Matlab/Simulink
* Working knowledge of VHDL
* FPGA Design Experience
* Experience creating reusable Verification IP.
* Experience leading small to medium teams with accountability for cost, schedule, and quality
* Experience driving process.
* Demonstrated mentoring skills Interested in hearing more? Easy Apply now by clicking the "Apply Now" button.