What are the responsibilities and job description for the Test Development Manager position at Synaptics?
Overview
Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications -- at home, at work, in the car or on the go.
We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics and video processing, combined with world class software and silicon development.
Responsibilities
This individual will lead a team of test development engineers (TDEs) creating ATE solutions for complex RF and mixed-signal semiconductor products. He/she will oversee development of schematics and direct layout activities for ATE loadboards and probecards for new, innovative, mixed-signal ICs. They will work closely with OSATs and ensure that their team of TDEs will release robust production test solutions for offshore manufacturing. In addition, he/she will drive cost reduction activities such as test time reduction, increased multi-site throughput and yield improvement.
Key Responsibilities:
- Lead the ATE development (both HW and SW) for complex, RF and mixed-signal ICs
- Oversee development of test plans with cross functional teams to optimize test coverage while minimizing test cost
- Lead TDEs driving the characterization of RF and mixed-signal ICs on ATE platforms such as Teradyne UltraFLEX RF
- Lead a team supporting ATE-to-bench correlation activities on critical parameters
- Work closely with development team to define DFT, develop new test methods and debug silicon issues
- Drive test time reduction, increased site count/throughput and yield enhancement activities
Qualifications
- Minimum of 10 years test development experience for mixed-signal semiconductor devices
- Strong communication and interpersonal skills
- Experience managing or leading a team of engineers
- Hands on experience managing test programs, test release schedules and full ATE development flow
- Proven track record of delivering robust, RF and mixed-signal IC test solutions for complex products in semiconductor industry
- Excellent communication skills for updating core team members on ATE development status
- Prefer experience with Teradyne UltraFLEX Platform. Advantest 93K SOC knowledge will also be considered
- Knowledge of MBIST, JTAG, SCAN and IDDQ, including vector translation from standard formats to ATE environment
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