Layout Artist Salary at Spi Energy Co Ltd BETA

About Etched Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Role Summary As a Substrate IC Package Layout Design Engineer, you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substates with OSAT providers. Intense focus on optimization for power delivery through subs

Job Description Job Description Description: Modem ASIC Team RFIC Layout Designer Job Description Job Summary In this role, you will work closely with the RFIC design team to layout and verify custom RF and analog IP for complex SoC products, on advanced CMOS processes. Responsibilities: • Detailed transistor-level layout of RF and analog circuit blocks including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO. • Layout of sensitive analog components including resistors, capacitors, and inductors • Block level and top-level layout through full verification flow including RLC extraction, DRC, LVS, and DFM checking • Co-work with designers on block-level and top-level floor-planning • Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling • Top-level layout integration and verification, schedule management. Requirements: • 5+ years experience in custom RF/an

COMPANY OVERVIEW: We are partnering with a high-growth startup at the forefront of semiconductor innovation. This company is redefining edge AI computing with cutting-edge technology and a highly talented team. Backed by strong funding and industry-leading expertise, they offer an exciting opportunity for engineers to work on next-generation SoC designs. With a culture of innovation, collaboration, and technical excellence, this is the perfect environment for engineers looking to make a significant impact in a fast-moving industry. JOB SUMMARY: The Analog Layout Engineer will lead a team of layout engineers to produce complex analog and mixed-signal blocks with high-quality layout. This role involves collaborating closely with project managers and design engineers, driving key layout decisions, and ensuring that all designs meet the required specifications and design guidelines. KEY RESPONSIBILITIES: Lead a team of layout engineers to produce complex analog and mixed-signal blocks with

Join a fast-growing startup redefining edge AI computing with cutting-edge semiconductor technology. Backed by strong funding and industry leaders, this team offers an exciting opportunity to shape next-gen SoC designs in a highly innovative and collaborative environment. The Memory Circuit Design Engineer will drive memory IC development from concept to tape-out, optimizing speed, power, and silicon efficiency while collaborating across teams to enhance performance. 🔹 Key Responsibilities: Lead memory IC design from concept to tape-out, optimizing speed, power, and silicon area. Develop and validate memory architectures (SRAM, DRAM, Flash, or NVM) using industry-standard tools. Troubleshoot design issues, collaborate cross-functionally, and support silicon bring-up. Stay updated on cutting-edge memory technologies and ensure high-quality, reliable designs. 🔹 Qualifications: MS/PhD in Electrical Engineering (focus on CMOS, digital, or mixed-signal design). 5+ years of experience in c

Lead Stack Inc. is an award-winning, one of the nation's fastest-growing, certified minority-owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. TITLE: Modem ASIC RFIC Layout Designer LOCATION: San Jose, CA 95134 DURATION: 6 Months with possible extension Rate: $85 to $110/hr Job Description: In this role, you will work closely with the RFIC design team to layout and verify custom RF and analog IP for complex SoC products, on advanced CMOS processes. Requirements 5+ years experience in custom RF/analog layout with extensive knowledge on deep sub-micron CMOS (28nm, FINFET’s, etc.) Knowledgeable on layout techniques for device matching, minimizing parasitics, RF shielding, and high-frequency routing Must recognize failure prone circuit and layout structures, proactively work with circuit

Meta Reality Labs - W2 Contract Electrical Engineer- Sunnyvale, CA Job Description: Meta is seeking an Electrical Engineer to join their team in Sunnyvale, CA! In this role you will be responsible for circuit design, schematic capture, and working with layout engineer team for board layout. The ideal candidate will have familiarity with schematic capture and layout design, understanding of EE fundamentals, and familiar with RTOS, FW, C/C++, Python. Furthermore, you should be familiar with board manufacturing process, SMT process, thinking out of the box and understanding RTOS and FW. Job Qualifications: Strong EE fundamentals with and experience in Circuit design Experience with Schematic Capture and familiar working with team on layout design Experience with RTOS and Firmware, Programming skills in C/C++, and Python Familiar with board manufacturing process and SMT process Understanding of electrical/firmware engineering principles Understanding of digital logic (ADC/Operational ampli

Role: Analog Layout Engineer Location: Fremont, CA (Onsite) Duration: Full Time Responsibilities: Lead a team of layout engineers to produce complex analog and mixed-signal blocks with high-quality layout Collaborate with project managers and design engineers to understand project requirements Drive critical floor-planning decisions and key layout methodology Ensure that all designs meet project requirements and adhere to design guidelines Review and approve final layout designs for production Stay up-to-date with industry trends and advancements in design software and techniques Attend project meetings, presentations, and other events as needed Requirements: B.S. EE and 8+ years of relevant industry experience or equivalent Experience in analog and mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes Proficiency in industry-standard design software, such as Cadence Virtuoso, Calibre DRC, LVS Strong understanding of layout design principles

Job Role: Electrical Design Engineer Location: Oakland, CA Duration: 12+ Months Must Have: Cable Routing, Cable layout design, Background in Rail/Solar/Oil & Gas Only Job Description: Expertise in Cable Routing and AutoCAD Background in Rail, Aerospace, Solar, Oil & Gas Must have designed (not just known) cable routing for complex systems Integration experience assembling multiple subsystems Familiarity with electrical substations, equipment rooms, TPSS/subsystems, transformer design, or similar Must be senior-level, able to support an ongoing project with minimal learning curve