Test Engineer Salary at Amax BETA

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Job Description Job Description MECHANICAL TEST ENGINEER Temp to Hire!! Overview: We are seeking a highly skilled Test Engineer to join our team in a Contract Manufacturing Environment. The successful candidate will play a key role in the design, execution, and validation of testing procedures for products manufactured under contract. This role requires a strong technical background, experience in product testing, and the ability to collaborate with cross-functional teams to ensure products meet industry standards and customer specifications. Key Responsibilities: Mechanical Testing & Validation: Develop, plan, and execute mechanical testing protocols for products in accordance with customer requirements, industry standards, and safety regulations. Conduct stress, fatigue, performance, and durability tests to validate mechanical components and systems. Analyze test results, identify issues, and collaborate with design and manufacturing teams to troubleshoot and resolve mechanical failu

Are you a HIL Test Engineer with BMS experience? Do you aspire to work for a market-leading EVTOL manufacturing organization? A cutting-edge EVTOL manufacturer is looking for a Hardware-in-the-Loop (HIL) Test Engineer to help validate the battery systems powering tomorrow’s air mobility. This is a 6–12 month onsite contract role based in California, with strong potential for a permanent position based on performance. Why This Role? You'll be joining a passionate team that's redefining what's possible in the EVTOL space. This is your chance to work hands-on with bleeding-edge battery technology in a dynamic, fast-paced environment where every test you run directly contributes to launching electric aircraft into the skies. What You'll Be Doing: Develop and run automated HIL test cases for battery management systems (BMS) Simulate real-world behaviors: voltage, current, SoC, thermal effects, and faults Work closely with software and hardware teams to validate safety and protection logic C

Senior AI&T Engineer $130,000 - $190,000 Full-time - On-site Burlingame, CA Company Overview: Our client is developing a next-generation navigation satellite network designed to enable precision technologies such as robotic farming and hands-free driving at a global scale. Their patented PULSAR network simplifies the complexity required to achieve robust, centimeter-level accuracy, making precision navigation accessible and affordable for industries that rely on automation and autonomy. Position Summary: The Senior Assembly, Integration & Test (AI&T) Engineer will be responsible for leading and executing all testing required for the deployment of the PULSAR satellite constellation. This role includes full ownership over production capabilities, ensuring the efficient verification and validation (V&V) of Xona payloads. The Senior AI&T Engineer will also provide strategic oversight for integration planning and operations on the production floor, working closely with engineering, manufact