Test Engineer Salary at Vehere BETA

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Design-for-Test Engineer Acceler8 Talent is looking for an experienced Design-for-Test (DFT) Engineer to join a high-performing San Francisco-based team, helping them create best-in-class silicon for high-performance and sustainable Generative AI. If you’re looking to make an impact in this exciting age of technological advancement, this opportunity may be for you! Founded by engineers who have been instrumental in the industry’s most successful semiconductor and AI products, this company is pushing the boundaries for what LLMs can accomplish. With a team comprised of industry veterans, talent and passion are the foundational pillars behind their success. As a Silicon DFT Engineer, you would execute the company's DFT implementation/verification and collaborate on physical design methodology from RTL to GDS. You would integrate DFT interfaces from IP blocks, develop pattern porting flow, and identify and execute efficient and effective DFT solutions based on chip architecture. This role

Senior AI&T Engineer $130,000 - $190,000 Full-time - On-site Burlingame, CA Company Overview: Our client is developing a next-generation navigation satellite network designed to enable precision technologies such as robotic farming and hands-free driving at a global scale. Their patented PULSAR network simplifies the complexity required to achieve robust, centimeter-level accuracy, making precision navigation accessible and affordable for industries that rely on automation and autonomy. Position Summary: The Senior Assembly, Integration & Test (AI&T) Engineer will be responsible for leading and executing all testing required for the deployment of the PULSAR satellite constellation. This role includes full ownership over production capabilities, ensuring the efficient verification and validation (V&V) of Xona payloads. The Senior AI&T Engineer will also provide strategic oversight for integration planning and operations on the production floor, working closely with engineering, manufact