Cloudops Engineer Salary at Einfochips Inc BETA

About the Company - Cadence is the leader in hardware emulation-acceleration technologies and products. Looking for a hands-on Principal HW Design Engineer who wants to expand their scope, and grow their career. This position is located in our San Jose headquarter office, reports to the Sr Engineering Group Director of R&D, and works in a growing talented organization. Our emulation-acceleration system platform is the most advanced industry-leading configurable scalable system, generation after generation, used in labs and datacenters. About the Role - This position requires the Hardware Design Engineer to do board design, schematic entry, work with layout engineers to do PCB layout, signal integrity, bring-up and sustain the current hardware system platform. Responsibilities Responsible for the design, bring-up and sustain of hardware system platform. Continuously develop and apply technical domain expertise in Hardware Engineering. Maintain a strong, high level of competence in Elect

Ciena is committed to our people-first philosophy. Our teams enjoy a culture focused on prioritizing a personalized and flexible work environment that empowers an individual's passions, growth, wellbeing and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact. How You Will Contribute: Reporting to a Director of Cyber Security, we are seeking a highly motivated and experienced Network Security Architect to join our growing team. In this role, you will be responsible for working with our security and networking teams to advise on, design, implement, and maintain the security posture of Ciena's global network infrastructure. You will play a key role in protecting our critical assets and data from evolving cyber threats. Your expertise and guidance are essential in ensuring that all processes and systems meet our company's security risk tolerance. As a trusted advisor, you will gather

Overview: Do you use or install complex tools or devices in a factory environment and frustrated with how they work and want to directly influence new products? Are you looking for a hardware centric industry that powers the tech behind other companies in Silicon Valley? Are you looking to transition into Product Management whilst utilizing your knowledge modern manufacturing factory systems and prove what your capable of? Unleash your engineering acumen at Mountz! As a Senior Applications Engineer, you'll lead the charge in developing groundbreaking fastening solutions, shaping the future of our power tool division. Collaborate across the company, orchestrate product launches, and leave a lasting legacy in manufacturing. This isn't just a job it's a chance to push boundaries, ignite innovation, and engineer the future of fastening. Join us! If you have integrated products on the manufacturing floor and/or built products for the manufacturing industry from conception through launch mul

TDengine has demonstrated the viability of its flagship product with 250+ paying customers, with a number of large enterprises among them. It also enjoys the support of an enthusiastic developer and user community. Based on such strong validation we plan to invest heavily to capture the market opportunities and are confident in the fact that our quantum leap in performance and storage efficiency will win over customers effectively. At the same time, we would not want to trivialize the efforts needed and challenges to be faced in such an endeavor. Role Overview: We are seeking a highly skilled and motivated Solution Architect to join our growing team. As a Solution Architect, you will work closely with customers, partners, and internal teams to design and implement innovative solutions using TDengine. Your primary goal will be to help customers maximize the value of our platform while addressing their specific use cases and technical challenges. Responsibilities: Solution Design and Arc

Company Overview: Business Integration Partners (BIP) is Europe’s fastest growing digital consulting company and are on track to reach the Top 20 by 2025, with an expanding global footprint in the US (New York, Boston, Chicago, Tampa, Charlotte, Dallas, and Houston). Operating at the intersection of business and technology we design, develop, and deliver sustainable solutions at pace and scale creating greater value for our customers, employees, shareholders, and society. Position Overview: BIP US is seeking to grow its US consulting team and is looking for a Data Scientist with 5-7 years of experience to join our BIP Bay Area consulting team. This consultant will work at the intersection of Finance and Engineering, helping us optimize revenue, track key financial metrics, and improve decision-making with data-driven insights. This consultant must thrive in fast-paced environments, have a passion for digging into data to drive business strategy, and be able to bridge the gap between Fi

We’re partnering with a fast-growing semiconductor startup revolutionizing edge AI computing. With strong funding and industry-leading expertise, they offer engineers the opportunity to shape next-generation SoC designs in a highly innovative and collaborative environment. The Analog Layout Engineer will lead a team in delivering high-quality analog and mixed-signal layouts. This role involves collaborating with project managers and design engineers, driving critical layout decisions, and ensuring all designs meet performance and manufacturing requirements. Key Responsibilities: Lead a team in delivering high-quality analog and mixed-signal layouts. Collaborate with project managers and design engineers to define requirements. Drive critical floor-planning and layout methodology decisions. Ensure designs meet project specs and industry standards. Review and approve final layouts for production. Stay current with industry trends and design tools. Qualifications: B.S. in Electrical Engin

Develop, validate, and maintain timing constraints for functional and test modes. Perform block-level and chip-level static timing analysis (STA) using PrimeTime. Debug and resolve timing violations in collaboration with RTL and physical design teams. Run synthesis using Genus (Cadence) and Fusion Compiler/Design Compiler (Synopsys). Conduct RTL linting and ensure compliance with design rules. Automate STA and timing closure flows using Perl/TCL scripting. Support timing closure for advanced process nodes (28nm, 16nm, and below). Work closely with cross-functional teams to ensure ASIC tapeout readiness.

Job Description: Essential Functions: Developing thorough technical requirements based on business needs Developing high-quality code based on detailed designs that meet requirements Creating comprehensive documentation, conducting thorough testing and following defined change control processes Providing support for a mission-critical application Demonstrating a high level of initiative and attention to detail during daily operations Implementing and maintaining internal, private and public web services Secondary Functions: Designing, developing, shipping and maintaining features with guidance from more experienced engineers Improving the development experience by enhancing development tools, test coverage, and/or code structure Implementing code that is clear, concise, tested and easily understood by others Required Qualifications: Relevant Bachelor's Degree and 5 years of relevant industry or academic experience, or Relevant Master's Degree plus 2 years of relevant industry or academ