Company | average base salary in (usd) | range |
---|---|---|
Intel
Senior Logic Design Engineer
|
$146,641/yr
|
RANGE: $134,923 - $158,358
|
Intel Corporation
Logic Design Methodology Engineer
|
$124,043/yr
|
RANGE: $111,103 - $136,983
|
Intel Corporation
IP Logic Design Engineer
|
$121,099/yr
|
RANGE: $111,061 - $131,137
|
FLC Technology Group Inc.
Logic Design and Verification Engineer
|
$102,499/yr
|
RANGE: $91,363 - $113,636
|
capgemini
Logic Design (RTL) Engineer
|
$101,752/yr
|
RANGE: $91,532 - $111,972
|
Teledyne FLIR LLC
Staff Logic Design Engineer
|
$137,994/yr
|
RANGE: $127,122 - $148,865
|
Intel GmbH
Senior Logic Design Engineer
|
$146,641/yr
|
RANGE: $134,923 - $158,358
|
Intel Corporation
Mixed Signal Logic Design Engineer
|
$125,528/yr
|
RANGE: $115,497 - $135,558
|
INTEL
GPU Logic Design Engineer/PPA Engineer
|
$130,483/yr
|
RANGE: $120,903 - $140,063
|
Solidigm
Senior NAND Logic Design / Verification Engineer
|
$118,378/yr
|
RANGE: $109,575 - $127,181
|
CITY | ANNUAL SALARY | MONTHLY PAY | WEEKLY PAY | HOURLY WAGE |
San Jose | $116,956 | $9,746 | $2,249 | $56 |
Santa Clara | $116,956 | $9,746 | $2,249 | $56 |
Fremont | $116,734 | $9,728 | $2,245 | $56 |
San Francisco | $115,806 | $9,651 | $2,227 | $56 |
Daly City | $115,806 | $9,651 | $2,227 | $56 |
Berkeley | $113,238 | $9,436 | $2,178 | $54 |
Oakland | $113,238 | $9,436 | $2,178 | $54 |
Hayward | $113,052 | $9,421 | $2,174 | $54 |
Antioch | $106,840 | $8,903 | $2,055 | $51 |
Vallejo | $104,318 | $8,693 | $2,006 | $50 |
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